VLSI Synthesis of DSP Kernels

Algorithmic and Architectural Transformations

Author: Mahesh Mehendale

Publisher: Springer Science & Business Media

ISBN:

Category: Technology & Engineering

Page: 210

View: 527

A critical step in the design of a DSP system is to identify for each of its components an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area-delay-power parameters. This essential book covers architectures that offer varying degrees of programmability.

Synthesis and Optimization of DSP Algorithms

Author: George Constantinides

Publisher: Springer Science & Business Media

ISBN:

Category: Technology & Engineering

Page: 164

View: 346

Synthesis and Optimization of DSP Algorithms describes approaches taken to synthesising structural hardware descriptions of digital circuits from high-level descriptions of Digital Signal Processing (DSP) algorithms. The book contains: -A tutorial on the subjects of digital design and architectural synthesis, intended for DSP engineers, -A tutorial on the subject of DSP, intended for digital designers, -A discussion of techniques for estimating the peak values likely to occur in a DSP system, thus enabling an appropriate signal scaling. Analytic techniques, simulation techniques, and hybrids are discussed. The applicability of different analytic approaches to different types of DSP design is covered, -The development of techniques to optimise the precision requirements of a DSP algorithm, aiming for efficient implementation in a custom parallel processor. The idea is to trade-off numerical accuracy for area or power-consumption advantages. Again, both analytic and simulation techniques for estimating numerical accuracy are described and contrasted. Optimum and heuristic approaches to precision optimisation are discussed, -A discussion of the importance of the scheduling, allocation, and binding problems, and development of techniques to automate these processes with reference to a precision-optimized algorithm, -Future perspectives for synthesis and optimization of DSP algorithms.

Proceedings

Author:

Publisher:

ISBN:

Category: Computer engineering

Page:

View: 473

VLSI Logic Synthesis and Design

Author: R. W. Dutton

Publisher: Ios PressInc

ISBN:

Category: Computers

Page: 318

View: 583

Very Good,No Highlights or Markup,all pages are intact.

Computer Arithmetic

Algorithms and Hardware Designs

Author: Behrooz Parhami

Publisher: Oxford University Press, USA

ISBN:

Category: Computers

Page: 641

View: 132

Ideal for graduate and senior undergraduate courses in computer arithmetic and advanced digital design, Computer Arithmetic: Algorithms and Hardware Designs, Second Edition, provides a balanced, comprehensive treatment of computer arithmetic. It covers topics in arithmetic unit design and circuit implementation that complement the architectural and algorithmic speedup techniques used in high-performance computer architecture and parallel processing. Using a unified and consistent framework, the text begins with number representation and proceeds through basic arithmetic operations, floating-point arithmetic, and function evaluation methods. Later chapters cover broad design and implementation topics-including techniques for high-throughput, low-power, fault-tolerant, and reconfigurable arithmetic. An appendix provides a historical view of the field and speculates on its future. An indispensable resource for instruction, professional development, and research, Computer Arithmetic: Algorithms and Hardware Designs, Second Edition, combines broad coverage of the underlying theories of computer arithmetic with numerous examples of practical designs, worked-out examples, and a large collection of meaningful problems. This second edition includes a new chapter on reconfigurable arithmetic, in order to address the fact that arithmetic functions are increasingly being implemented on field-programmable gate arrays (FPGAs) and FPGA-like configurable devices. Updated and thoroughly revised, the book offers new and expanded coverage of saturating adders and multipliers, truncated multipliers, fused multiply-add units, overlapped quotient digit selection, bipartite and multipartite tables, reversible logic, dot notation, modular arithmetic, Montgomery modular reduction, division by constants, IEEE floating-point standard formats, and interval arithmetic. Features: * Divided into 28 lecture-size chapters * Emphasizes both the underlying theories of computer arithmetic and actual hardware designs * Carefully links computer arithmetic to other subfields of computer engineering * Includes 717 end-of-chapter problems ranging in complexity from simple exercises to mini-projects * Incorporates many examples of practical designs * Uses consistent standardized notation throughout * Instructor's manual includes solutions to text problems * An author-maintained website http://www.ece.ucsb.edu/~parhami/text_comp_arit.htm contains instructor resources, including complete lecture slides

Book Review Index

2003 Cumulation

Author: Gale Group

Publisher: Book Review Index Cumulation

ISBN:

Category: Literary Criticism

Page:

View: 199

'Book Review Index' provides quick access to reviews of books, periodicals, books on tape and electronic media representing a wide range of popular, academic and professional interests. More than 600 publications are indexed, including journals and national general interest publications and newspapers. 'Book Review Index' is available in a three-issue subscription covering the current year or as an annual cumulation covering the past year.

High-Performance VLSI Signal Processing Innovative Architectures and Algorithms, Algorithms and Architectures

Author: H. J. Ray Liu

Publisher: Wiley-IEEE Press

ISBN:

Category: Technology & Engineering

Page: 692

View: 971

Electrical Engineering/Signal Processing High--Performance VLSI Signal Processing Innovative Architectures and Algorithms Volume 1 Algorithms and Architectures The first volume in a two-volume set, High-Performance VLSI Signal Processing: Innovative Architectures and Algorithms brings together the most innovative papers in the field, focused introductory material, and extensive references. The editors present timely coverage of algorithm and design methodologies with an emphasis on today's rapidly-evolving high-speed architectures for VLSI implementations. These volumes will serve as vital resources for engineers who want a comprehensive knowledge of the extremely interdisciplinary field of high-performance VLSI processing. The editors provide a practical understanding of the merits of total system design through an insightful, synergistic presentation of methodology, architecture, and infrastructure. Each volume features: * Major papers that span the wide range of research areas in the field * Chapter introductions, including historical perspectives * Numerous applications-oriented design examples * Coverage of current and future technological trends * Thorough treatment of high-speed architectures

Science Abstracts

Electrical & electronics abstracts. Series B

Author:

Publisher:

ISBN:

Category: Electrical engineering

Page:

View: 470

GLSVLSI '04

VLSI in the nanometer era : proceedings of the 2004 ACM Great Lakes Symposium on VLSI, Radisson Hotel, Boston, MA, USA, April 26-28, 2004

Author: ACM Special Interest Group on Design Automation

Publisher:

ISBN:

Category: Technology & Engineering

Page: 468

View: 308

Logic Synthesis for Field-Programmable Gate Arrays

Author: Rajeev Murgai

Publisher: Springer Science & Business Media

ISBN:

Category: Computers

Page: 427

View: 100

Short turnaround has become critical in the design of electronic systems. Software- programmable components such as microprocessors and digital signal processors have been used extensively in such systems since they allow rapid design revisions. However, the inherent performance limitations of software-programmable systems mean that they are inadequate for high-performance designs. Designers thus turned to gate arrays as a solution. User-programmable gate arrays (field-programmable gate arrays, FPGAs) have recently emerged and are changing the way electronic systems are designed and implemented. The growing complexity of the logic circuits that can be packed onto an FPGA chip means that it has become important to have automatic synthesis tools that implement logic functions on these architectures. Logic Synthesis for Field-Programmable Gate Arrays describes logic synthesis for both look-up table (LUT) and multiplexor-based architectures, with a balanced presentation of existing techniques together with algorithms and the system developed by the authors. Audience: A useful reference for VLSI designers, developers of computer-aided design tools, and anyone involved in or with FPGAs.

Synchroscalar

A Low-power Tile-based Media Architecture

Author: John Yasuhara Oliver

Publisher:

ISBN:

Category:

Page: 218

View: 786